High-performance, Low-power Delta-sigma Analog-to-digital Conversion

Introduction

The Delta-Sigma ADC is an important building block for numerous electronic circuits today. In the market of high-performance data conversion, it is the ever-increasing thirst for wider bandwidths and lower power consumption without compromise in resolution that drives demand. Examples of high-performance Delta-Sigma ADC applications include cellular basestations, digital media receivers, automated test equipment, and medical imaging. This technology advances the state-of-the-art in switched-capacitor implementations by offering an increase in bandwidth without penalty in resolution, thus paving way for future products not available today.

Two popular Delta-Sigma ADC structures are the cascade-of-resonators feedforward (CRFF) and cascade-of-integrators feedforward (CIFF) forms. CRFF has the the best quantization noise suppression performance, but requires the use of non-delaying integrators which can limit speed. CIFF does not have the non-delaying integrator requirement, but it pays a penalty in noise suppression performance. This technology offers a solution to this problem.

Benefits

• High performance
• Low power
• Small area relative to performance
• No calibration
• No clock boosting
• Flexible - can be clocked at different frequencies
• Relatively lower sensitivity towards clock jitter compared to continuous-time implementations

Features

• Has an SQNR advantage of 5-dB at 8x OSR with 4-b quantization as compared to the CIFF
• Active area of just 0.8mm2

Market Potential/Applications

Cellular basestations, digital media receivers, automated test equipment, and medical imaging

For further information please contact

University of Texas,
Austin, USA
Website : www.otc.utexas.edu