Description

Existing software being used for timing analysis falls into two cateqories: 1) extremely slow and very accurate (e.g., SPICE) or 2) verv fast, inaccurate, and topology-limited. RICE bridges this problem, in that it is very fast while retaining accuracy comparable to SPICE. Additionallv, it does not restrict the complexity of the RLC circuit models.

RICE is a software tool that allows a verv rapid characterization of RLC interconnect circuit models for the primary purpose of timinq analysis in digital VLSI circuits, multichip modules, and related timinq analysis problems. RICE is a collection of efficiently implemented specialized algorithms that allow very efficient, yet very accurate analysis of RLC circuit models.

Benefits

• Produces a reduced-order analytical model that completely characterizes the signal
  
• Bypasses the numerical instabilities of earlier methods
  
• Guarantees stable approximations for stable circuits
  

Market Potential/Applications

• Additional applications of the RICE software and techniques include transmission line characterization, VLSI power distribution analysis, and timing-driven placement algorithms.

For further information please contact:

University of Texas,
Austin, USA
Website : www.otc.utexas.edu