Description

Technology scaling adversely affects most parameters relevant to analog design, and ADCs are no exception. To achieve a high linearity, high sampling speed, and high dynamic range with low supply voltages and low power dissipation in ultra-deep submicron silicon technology is a major challenge. Moreover, as scaling continues, the intrinsic gain keeps decreasing, indicating that the device performance for precision analog devices decreases with continued scaling. Also, the explosive growth in wireless and wireline communications is driving the demand for high-resolution, high-speed, low-power, and low-cost integrated ADCs.

The invention provides an ADC (analog-to-digital converter) that utilizes active and/or passive variable-delay transmission lines to determine the digital signal. In preferred embodiments, to quantize an analog input signal, the propagation constant of traveling electronic wave is modulated parametrically by the input signal. Subsequently, at a plurality of coordinates within the path of the traveling wave, the time to arrival of the traveling wave is compared to a reference waveform. The collective results of these comparisons are then used to evaluate and subsequently quantize the input signal.

Benefits

• High speed, low power, and fully digital analog-to-digital conversion
  
• More power efficient than traditional ADCs, predominantly in integrated ADCs built using different semiconductor substrates
  
• Advantageous in deep sub-micron integrated circuit processes
  
• Allows scalability
  

Features

• The time difference between different travelling waves is compared, in contrast to the traditional ADCs where voltage levels are compared.
  

Market Potential/Applications

Analog and mixed-signal circuit design companies

For further information please contact:

University of Texas,
Austin, USA
Website : www.otc.utexas.edu